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Challenge and solution for characterizing NBTI-generated defects in nanoscale devices

Zhang, JF, Gao, R, Ji, Z and Zhang, WD (2020) Challenge and solution for characterizing NBTI-generated defects in nanoscale devices. In: 2019 IEEE 26th International Symposium on Physical and Failure Analysis of Integrated Circuits (IPFA) . (International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2 - 5 July 2019, Hangzhou, China).

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Negative bias temperature instability (NBTI) is a well known ageing process for CMOS technologies. Many early works were focused on large devices where device-to-device variations (DDV) are negligible. As device sizes downscale to nanometers, DDV becomes substantial. NBTI is a stochastic process and causes a time-dependent DDV. Characterizing the NBTI-generated defects in nanoscale devices has two main challenges. First, current fluctuates with time and this introduces uncertainties in measurements. Second, the test time is long and costly: to characterize the NBTI-induced DDV, it is essential to repeat the same test on multiple devices. This work reviews recent progresses in addressing these issues. Based on the As-grown-Generation (AG) model, it will be shown that the measurement uncertainties are dominated by As-grown hole traps and can be removed by subtracting the average value. To reduce the test time, the voltage step stress (VSS) technique is combined with the Stress-Discharge-Recharge (SDR) method. This VSS-SDR technique reduces test time to within one hour per device. The model extracted by VSS-SDR is verified by comparing its prediction with the test data obtained under conventional constant voltage stress.

Item Type: Conference or Workshop Item (Paper)
Additional Information: © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
Subjects: T Technology > TK Electrical engineering. Electronics. Nuclear engineering
Divisions: Electronics & Electrical Engineering (merged with Engineering 10 Aug 20)
Publisher: IEEE
Date Deposited: 18 Jul 2019 11:41
Last Modified: 08 Jul 2024 14:47
DOI or ID number: 10.1109/IPFA47161.2019.8984899
URI: https://researchonline.ljmu.ac.uk/id/eprint/11067
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