Items where Author is "Arimura, H"
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Ji, Z, Gao, R, Zhang, JF, Zhang, WD, Duan, M, Ren, P, Arimura, H, Wang, R and Franco, R (2016) Understanding charge traps for optimizing Si-passivated Ge nMOSFETs. In: 2016 IEEE Symposium on VLSI Technology . (Symposia on VLSI Technology and Circuits, 13th-17th June 2016, Hawaii, US).
Ma, J, Zhang, WD, Zhang, JF, Benbakhti, B, Ji, Z, Mitard, J and Arimura, H (2016) A comparative study of defect energy distribution and its impact on degradation kinetics in GeO2/Ge and SiON/Si pMOSFETs. IEEE TRANSACTIONS ON ELECTRON DEVICES, 63 (10). pp. 3830-3836. ISSN 0018-9383