Zhang, JF, Ma, J, Zhang, WD and Ji, Z DEFECTS AND LIFETIME PREDICTION FOR GE PMOSFETS UNDER AC NBTI STRESSES. In: China Semiconductor Technology International Conference (CSTIC), 11 March 2017 - 13 March 2017, Shanghai, China. (Accepted)
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CSTIC 2017_Symposium 1-20_Jian-Fu-Zhang.pdf - Accepted Version Download (515kB) |
Abstract
Germanium has higher hole mobility and is a candidate for replacing silicon for pMOSFETs. This work reviews the recent progresses in understanding the negative bias temperature instability (NBTI) of Ge pMOSFETs and compares it with SiON/Si devices. Both Ge and SiON/Si devices have two groups of defects: as-grown hole traps (AHT) and generated defects (GDs). The generation process, however, is different: GDs are interface-controlled for SiON/Si and dielectric-controlled for Ge devices. This leads to substantially higher GDs under DC stress than under AC stress for Ge, although they are similar for SiON/Si devices. Moreover, GDs alter their energy levels with charge status and can be reset to original precursor states after neutralization for Ge, but these processes are insignificant for SiON/Si. The impact of these differences on lifetime prediction will be presented and the defects and physical mechanism will be explored.
Item Type: | Conference or Workshop Item (Paper) |
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Subjects: | T Technology > TA Engineering (General). Civil engineering (General) |
Divisions: | Electronics & Electrical Engineering (merged with Engineering 10 Aug 20) |
Publisher: | IEEE |
Date Deposited: | 04 Apr 2017 09:00 |
Last Modified: | 13 Apr 2022 15:15 |
URI: | https://researchonline.ljmu.ac.uk/id/eprint/6205 |
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