Liu, C, Ren, P, Zhou, B, Zhang, JF, Fang, H and Ji, Z (2021) Investigation on the implementation of stateful minority logic for future in-memory computing. IEEE Access, 9. pp. 168648-168655. ISSN 2169-3536
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Investigation on the implementation of stateful minority logic for future in-memory computing.pdf - Published Version Available under License Creative Commons Attribution. Download (6MB) | Preview |
Abstract
In-memory computing is one of the best ways to solve the delay and power consumption issues of traditional von Neumann structures in the current Internet of Things and big data era. The realization of in-memory computing based on memristors is being widely studied because of its simple structure, high integration, and compatibility with CMOS technology. Minority logic is considered as the most suitable to realize computation function, and the basic cell based on memristors to implementing minority logic has also been proposed. However, from our analysis, it has requirements on device electrical character. After fabricating resistance random access memory (RRAM) devices that meet requirements, demonstration still cannot achieve. Through theoretical derivation and simulation, resistance variation is the main reason for wrong results. Moreover, high variation devices with existing technology can be chanllenging to demonstrate the basic logic cell.
Item Type: | Article |
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Uncontrolled Keywords: | 08 Information and Computing Sciences, 09 Engineering, 10 Technology |
Subjects: | Q Science > QA Mathematics > QA75 Electronic computers. Computer science |
Divisions: | Computer Science & Mathematics |
Publisher: | Institute of Electrical and Electronics Engineers |
Date Deposited: | 14 Dec 2021 10:39 |
Last Modified: | 11 Feb 2022 12:45 |
DOI or ID number: | 10.1109/ACCESS.2021.3134687 |
URI: | https://researchonline.ljmu.ac.uk/id/eprint/15921 |
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